80386dx Microprocessor Debug Command and Instructions

Introduction:

Background

The task of this lab consists of assembling instructions in a memory that stores instructions along with memory that stores data and reads it from or writes it to registers. The inputs are entered using debug commands to change register and memory values. Some of the debug commands are indicated as follows:

• D for dump
• R for displaying and accessing registers
• X for assembling instructions.

The address inputs are indicated with brackets representing the address to access memory. The addresses are indicated as follows:

• [ 1234] for direct
• AX for registers
• [AX] for indirect.

The registers are eight bits representing the byte, sixteen bits representing the word up to 32 bits representing the double word to memory. The eight bit registers are indicated as follows:
BL, BH, CL, CH, DL, DH, with the H for most significant byte and L for least significant byte.

The sixteen bit registers are indicated as follows: AX, BX, CX, DX.

Problem Description

This lab will use the real mode instruction set. Instructions are stored in the CS register and accessed using an offset called the IP (Instruction Pointer). Every time a new instruction or set of instructions is entered the IP will have to be set to the same memory location where the instructions are being assembled. One of the things that has to be remembered is that the least significant part of a number has to be located at the lowest addressed byte of a word or double word. Instructions or data will be written to memory and registers by using debug commands which will set up each problem. Assembly language uses registers to load for data, instructions, or advance the counter for the address of the memory. The instruction register will point to the next instruction. Some of the assembly language instructions will be to demonstrate arithmetic and logic functions, others will change the flag register bits and demonstrate how jumps work. The assembly language instructions are to be carried out with the T debug command. Also, the result of which will be sent to the registers.

Goals and Specifications

• To get familiar with the DEBUG prompt, which is the first key for starting the lab
• To learn more about getting the value of specific registers or changing their values to others.
• To expand our knowledge about a couple of commands, which were given to us, that were very useful at the starting point.
• In this experiment, we were asked to get some information after typing the right command.
• To learn more about the physical address, effective address, and data Segment, etc.
• To be familiar with the MOV, ADD, DEC and JNZ commands, etc., and how they work.

Final Results

1. We are instructed to type DEBUG at the command prompt in order to be able to perform other instructions.

2. As we typed R at the command, we got values of certain registers.

• CS = lD79H
• IP = 0100H
• PA = (CS:IP) which was
• PA = ID79:0100H      Zero is not shown for CS = 1D890

3. Typing R AX at the prompt allowed us to change the value of the contents of the AX register. So, we input the new value of AX, which was 55AAH. The value of AL was taken from the lower byte of AX, which was AAH. Typing R AL gives an error (br error to be exact).

4. The code for the parity flag is given as:

The code shown on our screen is PE, which stands for Even Parity.

5. Typing UP changed the value of the direction flag to UP. We changed the value of DS register to 0E00 as well as ES register to 1000.

6. We changed the value of the DS register to 0E00 as well as the ES register to 1000.

DS = OEOO
ES = 1000

DS overlap ES       the answer is:         overlapping

7. The physical address of the first memory location displayed was 0E00:0200. PA = 0E200, the offset of 200H relative to the DS. Also to display the content of memory at an offset 300H for the code segment we typed the command D CS:300

8. The ASCII character stored at addresses DS:2C0 through DS2C4 were ABCD%. The command to store A1B2C3 at DS:200 is E 200 "A1B2C3".

9. The memory locations were five and the placed value in the memory location ES:105 was 12.

10. The command is:      M DS:20 2F ES:10

11. The assembly language instruction that is represented by machine code C3H is RET

12. BL is the destination.

13. The machine code is 00D3.

14. The value of the offset is EA = 0432 that was used by the MOV command. There were three bytes because we had the machine code 8A5002 * 4 = 24 / 8 = 3.

15. The value of the DL register: 55h
The value of the instruction pointer increased by 3 bytes and that could explained as:

End:	5F ......... 203
	02 ......... 202
	50 ......... 201
Start:	8A .......CS:200

16. After resetting the instruction pointer, we entered the multiple instructions:

1. MOV  DL,OF
2. MOV  CL,3
3. ADD  DL, 3
4. DEC  CL
5. JNZ  204

17. Table for running the instructions from problem 16.

IP	DX	DL	CX	CL	Machine Code	Assembly Language
0200	00	00	00	00	B20F	MOV DL,0F
0202	00	0F	00	00	B103	MOV CL,03
0204	00	0F	00	03	80C203	ADD DL,03
0207	00	12	00	03	FEC9	DEC CL
0209	00	12	00	02	75F9	JNZ 0209
0204	00	12	00	02	80C203	ADD DL,03
0207	00	15	00	02	FEC9	DEC CL
0209	00	15	00	01	75F9	JNZ 0204
0204	00	15	00	01	80C203	ADD DL,03
0207	00	18	00	01	FEC9	DEC CL
0209	00	18	00	00	75C9	JNZ 0204
020B	00	18	00	00	56	PUSH SI

18.
The addressing mode of the first operand of the instruction is Register Operand Addressing Mode.
The operand is BX.
The addressing mode of the second operand of the instruction is Immediate Operand Addressing Mode.
The operand is 02.
The last byte of the machine code for the instruction is 02.
The byte represents data.
The value of BX register when the instruction was executed added 2 from 00FA to 00FC:

BX:	00FA
+	0002
	00FC

The instruction pointer moved 3 Bytes, from 0100 to 0103.
The value of the parity flag is PE Even Parity.
FC is equivalent in binary to 1111 1100 which contains 6 ones that made it even.

19. The addressing mode was register indirect addressing mode.

• The data at DS:[SI] moved to CX.
• In other words, CX changed from FFFF to AA55.
• No changes occurred to SI.
• The value in the parity flag was odd (PO) and it was set to this value because the move command does not affect the parity.

20. The addressing mode was Direct Addressing Mode.

• The last two bytes of the machine code were 0B03 and these bytes represent an effective address.
• The AX register changed when the instruction was executed and more precisely, the change occurred to AL.
• AA was moved and AX became 00AA.
• It is a memory address.

21. The physical address corresponding to the logical address DS:31B:

DS =	1 D 7 9 0
EA =	0 3 1 B	by adding the DS and EA.
PA =	1 D A A B

The physical address corresponding to the logical address DS:30B:

ES =	1 D 7 A 0
EA =	0 0 3 0 B	by adding the DS and EA.
PA =	1 D A A B

• The value was moved from ES:30B to AL.
• The assembly language would be
  SS: ADD BH, [0333]

22.
DS: 030B = D3
SS:030B = D3. The contents in the stack segment at address BP = 030B is D3, so [BP] = D3. The value of D3 was moved to CH. The result in CH = D3FF.
DS: MOV CH,[BP]

23. The values in BX and CX registers were swapped. After the instruction:

BX = AAAA
CX = 5555

24. The SP changed from FFFE to FFEC. Second, the top of stack address decreases as items are pushed.

25. The value of the SP register went from FFEE to FFFO (SP increased by two) the CX register went from FFFF to 0000. In other words, it was popped out.

26. The new value of the BX register after the instruction executed was FFFB. The value of the sign flag was ( SF = NG ).

27. When the command ADD AX, BX was executed, the value in the BX register was added to the AX register and the result was put in AX. AX went from 0002 t0 0005.

28. The new byte values in memory address DS:300 and DS:301 before and after the instruction was executed were:

Before	DS: 300 = 00
	DS: 301 = 07
After	DS: 300 = FF
	DS: 301 = 06

06FF
DEC BYTE PTR [301]

We cannot tell if byte, word or double word.

29.
AX = 0100
AX = 256 Decimal
AL = 128 Decimal
BL = 2 Decimal

30. Assemble the instruction IMUL BL into CS:100

      A. after the instruction: AX = FFFE
      B. decimal equivalent: AX = -2
      C. decimal equivalents, before instruction: AL = -1, BL = 2

31. Assemble the instruction IMUL BX into CS:100

      A. after the instruction: AX = FFCA, DX = FFFF
      B. decimal equivalent: DXAX = -54
      C. decimal equivalents, before instruction: AX = -18, BX = 3

32. Assemble the instruction CBW into CS:100

      A. after the instruction: AX = AAA0
      B. decimal equivalent: AX = -2
      C. decimal equivalents, before instruction: AL = -2

33. Assemble the instruction AND AL,[500] into CS:100

      A. after the instruction: AX = AAA0
      B. binary representation: DS:500 = 11110000
      C. binary representation: AL = 10100000

34. Assemble the instruction SHL AL, 1 into CS:100

      A. after the instruction: AL = 8A
      B. decimal value after the instruction: AL = -118
      C. decimal value before the instruction: AL = -59
      D. equivalent of decimal multiplication by: 2

35. Assemble the instruction SHL AL, CL into CS:100

      A. after the instruction: AL = CO
      B. decimal value after the instruction: AL = -64
      C. decimal value before the instruction: AL = -16
      D. equivalent of decimal multiplication by: 4
      E. instruction that multiplies FFH by 16: SHL AL,CL
      F. decimal value before the instruction: CL = 4
      G. value after the instruction: AL = F0 (-16 decimal)

36. Try to assemble the instruction SAL AL,1 into CS:100

      A. what happens when assembling: ^ERROR
      B. why not necessary to implement: SAL and SHL do the same thing

37. Assemble the instruction SAR AL,1 into CS:100

      A. value after the instruction: AL = F2
      B. decimal value after the instruction: AL = -14
      C. decimal value before the instruction: AL = -28
      D. equivalent of decimal division by: 2

38. Assemble the instructions SAR AL,1 and SHR AL,1 into CS:100

      A. SAR machine code: D0F8
           SAR machine code: D0E8
           No, they are not the same

      B. SAR: fill the vacated bit positions on the left with the original msb (most significant bit )
           SHR: fill the vacated bit positions on the left with zeros

39. Assemble the instructions STC and ADC AX, 2 into CS:100

      A. value after the instruction: AX = 0008

      B. value after only STC instruction: CF = CY

      C. instruction instead of STC: CLC

40. Assemble the instruction CMP CL, BL into CS:100

      A. values after the instruction: ZF=NZ, SF = NG

      B. no, CL and BL did not change

      C. yes, CL and BL do not change, SF stays the same at PL, but ZF changes to NZ

41. Assemble the instruction SUB CL, BL into CS:100

      A. values after the instruction: ZF=NZ, SF=NG

      B. yes, CL changed from 05 to FF, however, BL did not change

      C. the operand register such as CL does not change for CMP but does for SUB, for SUB it goes to zero.

42. Assemble the instructions DEC CL and JMP 100 into CS:100

      A. JMP 100 machine code: EBFC
      B. logical address following JMP 100 instruction: IP = 0104
      C. decimal equivalent, machine code second byte: FC = -4
         It means to decrement the instruction pointer by 4 bytes to the beginning of the loop (DEC CL)
      D. type of operand: short-label
      E. table for running jump instruction loop

Instruction Pointer	CX		Assembly Language Instruction
	CH	CL
0100	00	08	DEC CL
0102	00	07	JMP 0100
0100	00	07	DEC CL
0102	00	06	JMP 0100
0100	00	06	DEC CL
0102	00	05	JMP 0100

43. Assemble the instruction JMP 800 into CS:100

      A. value in IP after the instruction: IP = 0800

      B. JMP 800 machine code: E9FD06

      C. word decimal equivalent, machine code second and third byte: 06FD = 1789

      D. type of operand: near-label

      E. The JMP 800 instruction has a 16 bit displacement. The range for a short label 8-bit displacement is too small (-126 to +129)

44. Assemble the instruction JMP CF00:200 into CS:100

      A. value before the instruction: CS = 1D79

      B. values after the instruction: CS = CF00, IP = 0200

      C. JMP CF00:0200 machine code: EA000200CF

      D. 32-bit immediate operand ( or 32-bit pointer ) FDO6 = -762

      E. machine code second byte: offset address for the IP

         machine code third byte: new CS address which is loaded into the CS register

      F. type of operand: far-label

      G. difference between absolute and relative jump: Absolute jump uses a number for the jump instruction address. Relative jump uses the difference that is encoded into the instruction.

45. Assemble the instruction JMP BX into CS:100

      A. value after the instruction: IP = 0200

      B. BX, absolute or relative address: absolute

      C. type of operand: 16 bit register pointer

46. Assemble the instruction JMP WORD PTR [500] into CS:100

      A. value after the instruction: IP = 0580

      B. DS:500, absolute or relative address: absolute

      C. type of operand: 16 bit memory pointer

47. Assemble the instruction JMP FAR [500] into CS:100

      A. values after the instruction: CS = C500, IP = 0400

      B. type of operand: 32 bit memory pointer

48. Assemble the instruction CALL 400 into CS:100

      A. how many bytes stored on stack: 2

      B. information stored on the stack: address offset, address to which control is to be returned at completion of the subroutine. CS:IP

      C. table for call instruction

Instruction Pointer	Stack Pointer
0100	FFEE
0400	FFEC
0403	FFEE
0103	FFEC

Conclusion and Summary

A total of forty-eight problems were performed in this lab. Some of the problems were using debug commands especially at the beginning. Most of the problems involved carrying out assembly language instructions, in some cases multiple instructions as in the case with the jumps or call. One of the problems we had was with the IP ( Instruction Pointer ). This was noticed around problem number 22 which involved using the XCHG command. The registers would not exchange after the command was executed. This was because the IP was not placed back at 0100. When the IP was set at 0100 prior to every instruction, they all ran correctly. All types of instructions were implemented; one CALL, two stack instructions: PUSH and POP, many MOV and shift instructions, quite a few multiplication and addition instructions. It was observed that the CMP and SUB instructions are nearly the same except the CMP doesn't return a result. In the case of this instruction what matters is how the flags are set after the instruction is executed. There were some problems that involved setting and resetting the flags. Another thing that was noticed was that not all of the shift instructions work. This was because the SAL and SHL instruction are equivalent and the assembler will only accept SHL. As a result, much was learned in this lab about the processor and assembly language.

We were able to complete the work correctly for all problems. The answers came out as intended and there were no incorrect results. All objectives were accomplished.

References

Walter Tribel, "The 80386, 80486, and Pentium Processors: Hardware, Software, and Interfacing", Prentice Hall, 1998, ISBN #0-13-533225-7